CompEAS-HW
The execution of software has a significant impact on various runtime characteristics of the hardware. Software critically influences the energy consumption, thermal, or the electromagnetic behavior of a microcontroller unit. While Electromagnetic Compatibility Check analyses can be used for side-channel attacks, critical temperature patterns and LoadJumps (LJ) or PowerPeaks (PP) can lead to malfunctions. The new topic "Optimization of processor power characteristics in software" under CompEAS-HW shall be dedicated to the avoidance of LoadJumps and PowerPeaks.
Together with its industrial partner Elektrobit Automotive GmbH (Erlangen), CompEAS-BSW project has been dedicated to reliability aspects and the dynamic composition of software for embedded automotive systems (EAS). These aspects are now to be extended to the hardware together with Infineon AG (Munich) across the entire system stack.
The CompEAS-BSW project is already dedicated to the specification and implementation of Non-Functional Requirements (NFR) for software components. Hardware often imposes limits on their fulfillment/implementation through Non-Functional Properties (NFP). Intermediate Basic Software (BSW) or Hardware Adaptation Layer (HAL) layers mediate between ASW and HW and require a complete and formal specification of NFR and NFP. Unfortunately, this specification is usually inadequate, which is why novel concepts must be developed to mitigate the resulting problems. The collaboration with Infineon in CompEAS-HW will lead to new insights for the optimization of processor performance characteristics in software.
Goals
The CompEAS-HW (Compositional Embedded Automative Systems) project investigates the interactions and synergies between embedded automotive software and hardware. Scientific methods are to be used to (1) derive concrete questions from practice, (2) develop viable solutions for the systematic implementation of future hardware and (3) transfer the knowledge gained to the partner companies and established standards.
Overarching optimizations at the compiler, BSW, and HW levels are intended to facilitate the development of software that fundamentally triggers fewer (or no) Load Jumps and PowerPeaks. This, in turn, has implications for the design of future hardware and software, as well as the mechanisms they contain for handling critical LJ/PP situations at runtime. The insights/results obtained can serve as information for software developers (Dos & Don'ts) as well as for the creation of specifications/guidelines for compiler and BSW vendors. They should support the development and optimization of future hardware (e.g., processor cores, on/off-chip components).
Approach
The approach under CompEAS-HW is to analyze processors by executing code sequences with respect to LJ/PP. The effects of concrete code sequences can be determined by HW simulation, self-monitoring (if supported by the hardware), or external measurement. For this purpose, appropriate models must be implemented, or test setups must be realized. The next step is to create a methodology to detect critical code sequences in real code or even generate them specifically for the test case generation. Then develop a method to statically and dynamically resolve the critical code and optimize its execution at runtime.
Expected and Achieved Results
CompEAS addresses with the dynamic composition and reliability of the entire software stack of embedded systems: The holistic approach ranges from the conception of future basic software (model-based OS design and portability) to module-based software development and novel processor architectures (optimization of energy behavior).
The results of CompEAS are expected to help improve/expand the partners’ service and product portfolio while optimizing internal development processes. It is expected that the technology transfer will open up new business models through the intensive interaction of all partners, as more flexible and reliable products and services can be offered to customers. All partners are expected to benefit from the CompEAS employees as highly qualified experts for further projects and as co-designers of future automotive standards, thus also strengthening the industrial location Graz and Austria. From an academic perspective, a significant contribution to the scientific community is expected: This should include the scientific publication of the results.
