The goal of the project is to define models that should help to identify and classify the errors which might occur while producing chips. The outcome of the project should be a best-practice guide on what to consider when defining such models. This mainly comprises the methods that have been successfully applied to address the challenges we faced during this project: export and postprocessing the data from the plant, processing of the trainings data, defining of the classification model for error detection on the chip surface etc. With this guide we aim to support the experts who might face the same challenges in future projects.

The first challenge is to identify the relevant part of the images. A too large picture can distract and thus reduce the quality of the classification. Further, larger images increase the complexity of the data processing and the performance of the approach. Too small images on the other hand could hide relevant structures and thus reduce the classification quality as well. Chip images which are used for training a classification model should first contain the appropriate context in terms of defect structure. This means characteristics should be as distinguishable and intense as possible from the remaining complex chip architecture so not to raise any confusion to the later prediction process. As it’s possible from the automated inspection system (AOI) to extract the images with the defect centered, that can facilitate for building a more reliable and accurate model.

In cases where entire chip images are provided with the four soldering joints (Lötstellen) an initial classifier model (CascadeClassifier) is trained so to extract automatically the areas of interest, namely the four soldering positions. A separate classification model (Haar Cascade Classifier) was first trained on 100 images. Inside these instances, the four soldering regions were manually defined by defining rectangles, enclosing the joints, of certain width-to-height ratio (256x256px) with their location coordinates. The extracted images of the soldering joints are fused with the labelling information regarding the fact that is defect or not.

All defect images should have a constant size which need to be fed into the neural network model initially for training. After interviews and first wafer data we concluded to an image size of 90x90 px so that to achieve a trade-off between algorithm performance (final model size) and classification accuracy. Experiments have been conducted for the initial classification problem of the 3 defect classes (“Druckstelle”, “Verschmutzung”, “PR-Fehler”) so to benchmark the utilized image size. Images with sizes greater than 90px (e.g. 128x128) were also tested and findings showed that complexity was increased and thus classification performance decreased.

Convolutional Neural Networks (CNN) with its many architectural variations can fit very well for demanding applications of image recognition tasks. Across the internet there many available datasets (see CIFAR-10 and CIFAR-100, MNIST or also ILSVRC 201* which are mainly used for benchmarking novel models as well as to mark overall dataset specifications.

We conducted an experiment to examine the effect of the training data size on the classification accuracy. We deployed the model with the five defect classes from the WB-AOI, as images from within these classes are more homogeneous and stable. It is essential that testing images to evaluate are coming from the same distribution (similar image context within classes), otherwise the outcome will be biased. Also, this is a strong indication that the model should be updated by training with the novel images, that the model failed to classify correctly. By above 1200 images per class the classification accuracy is converging and thus providing sufficient evidence for the adequacy of the training data size.